HELSINKI UNIVERSITY OF TECHNOLOGY
ABSTRACT OF THE MASTER'S THESIS
Author: Qing Jin Name of the thesis: Hardware design of trancoder controller, variant S (TRCO-S) plug-in unit Date;
3.9.1999 |
Faculty: Electrical and Communications Engineering Professorship: Telecommunications |
Supervisor: Professor Sven-Gusiav Häggman Instructor: Master of Science Jari Korhonen |
In this thesis, different blocks of the plug-in unit and design process are described. The subject of the Master's thesis is mostly the specification and simulation of the unit. In the simulation
of the plug-in unit, attention was paid to the possibility of automatic
simulation by using the bus functional processor model and bus stimuli.
Processor behaviour was described using Iugic Modeling PCL language and
bus stimulus was created using Mentor Graphics AMPLE language. The design
blocks were simulated separately by TRCO-S plug-in unit simulation menu,
which were made by AMPLF, language as well. |
Keywords: TRCO-S, DX200, DAXnode WLL, hardware, PCB, simulation |